How this calculation works
Reduce the lower resistor and load in parallel before applying the voltage divider. Check upper current against the sum of lower and load currents and report the unloaded Thevenin resistance.
Rlow,eq = Rbottom || Rload; Vout = Vs × Rlow,eq / (Rtop + Rlow,eq)A worked example
A 12 V source with 10 kΩ upper, 10 kΩ lower and 10 kΩ load gives a 5 kΩ lower equivalent and 4 V output. Removing the load gives 6 V; the loaded branch draws part of the divider current.
Good to know
Ideal DC source and constant positive resistors. No active load, source impedance, tolerance, noise, transient, regulation or component-rating model. All resistance fields share the selected unit.
Reference: Reference: model definitions and scope (opens in a new tab) ↗
A load becomes part of the lower divider branch
An unloaded 12 V divider with two 10 kΩ resistors has a 6 V midpoint. Add a 10 kΩ resistor as a load across the lower branch and the effective lower resistance becomes 5 kΩ. The output becomes 12 × 5/(10 + 5) = 4 V.
The upper resistor then carries 0.8 mA. The original lower resistor carries 0.4 mA, and the load carries another 0.4 mA. Adding those branch currents matches the upper current. Simply using the unloaded ratio would miss the current drawn by the load.
Parallel resistance can check the lower/load equivalent. A loaded voltage divider must then include that equivalent before calculating the output voltage.
Output resistance explains why loading matters
The ideal unloaded divider has a Thevenin resistance of 10 kΩ in parallel with 10 kΩ, or 5 kΩ, when the ideal source is shorted. Pairing its 6 V Thevenin voltage with a 10 kΩ load gives the same 4 V result.
The comparison table keeps the divider fixed and changes the hypothetical load. A load one tenth of the lower resistor pulls the output down to 1 V in the default example; a load ten times the lower resistor gives about 5.714286 V. These are constant-resistance cases, not a model of an active device’s changing input current.
The divider result does not make the circuit a regulator
All entered resistors share the chosen resistance unit. Changing from kΩ to Ω reinterprets the values unless you also convert the numbers. Reversing the source reference reverses voltage and current signs while the resistive power dissipation remains non-negative.
The parallel resistance calculator checks a separate two-resistor equivalent. The ADC quantization calculator can describe a sampled voltage range after a front end, but that ideal quantizer does not validate input impedance or settle time. This divider page likewise does not model tolerance, noise, source impedance or a regulated power supply.
A few questions, answered
Where is the modeled load connected?
Across the lower resistor, between the divider output and its reference return.
Does open-circuit mode ignore a typed load resistance?
Yes. The inactive load field does not participate in validation or calculation.
Why is output reduction undefined at zero source voltage?
The relative reduction would divide by the zero unloaded voltage. The absolute output and currents are still zero.
Does this determine component power ratings?
No. Calculated power and ideal current relationships do not select tolerances, ratings or thermal margins.